Doherty type amplifiers are widely used for power amplifiers in wireless communications due to their higher efficiency when handling variable power levels, which are common in multi-carrier wireless communications systems. Doherty amplifiers comprise a main amplifier and a peak amplifier, the main amplifier handling power levels up to a threshold point with high efficiency and the peak amplifier handling power levels above the threshold point. Together, the main and peak amplifiers, which typically operate according to different classes, can deliver an improved efficiency compared with a similarly rated single stage amplifier.
WO2009081341A1 describes a 3-way Doherty amplifier architecture. It enables high efficiency over large dynamic range without suffering from load-line modulation disruption as in the conventional case and as a result enabling the use of simple passive splitters.
An important advantage of this architecture is that, contrary to the conventional case, high efficiency over a large dynamic range can be attained if the total power is commensurately (1:1:1) distributed over the three branches. Utilizing the same transistor type in each branch is beneficial in terms of amplifier yield in mass production.
However, the above-mentioned Doherty amplifier has a number of limitations when it comes to further enhancing the efficiency, increasing the peak power capability and reducing size and cost.
We may summarize the main drawbacks of the cited amplifier as:                The demand for ever increasing efficiency necessitates incommensurate distribution of the total power over the three branches which forces the use of at least two transistor types. Good yield and performance consistency in mass production may then require complicated device selection and pairing procedures. This will have a detrimental effect on the production yield of the transistors.        With this approach significant improvement of the average efficiency can only be realized for complex modulated signals that have larger peak-to-average-ratios then contemporary signals.        Meeting the ever increasing peak power demands from the market require very high peak power devices which suffer from low impedance and performance degradation due to power scaling effects. This makes achieving good performance at high peak powers in a 3-way Doherty difficult.        The continuous push from the market to reduce size and cost with higher performance are difficult to realize in the three-way Doherty approach.                    1. E.g., integrating two devices in a dual package with extremely high peak powers is beyond the capability of current technologies.            2. Integrated dual MMIC drivers require complicated asymmetrical power configurations to drive the main and the two peaks.            3. Three-way asymmetrical input splitters in stripline technology consume a lot of PCB real estate and alternatives with standard quadrature hybrids are very difficult.                        